

B-6/305, Vindhya Building
Center for VLSI and Embedded System Technologies (CVEST),
IIIT Hyderabad, Gachibowli,
Hyderabad, Telangana, 500032.
Email: abhishek.srivastava@iiit.ac.in
In the area of RF/Analog ASIC design. Motivated scholars for full time positions are encouraged to connect through email
Research assistants required in sensors/hardware/ embedded-system-design area
I am a faculty member at the Center for VLSI and Embedded System Technologies (CVEST), IIIT Hyderabad, where I lead the IC~WiBES Research Lab (Integrated Circuits inspired by Wireless and Biomedical Electronic Systems). My group’s research is defined by a unique, dual-track approach to Silicon-to-System Integration. Unlike traditional silos, our work operates at the intersection of custom IC design and intelligent system deployment. This “Parallel Track” strategy allows us to maintain a continuous pipeline of innovation:
Through active exposure to both tracks, my group gains a deep, firsthand understanding of the practical field challenges and product requirements that define real-world performance. This perspective ensures our circuits are not just theoretically sound, but robust enough for indigenous, field-ready deployment. This “Full-Stack” philosophy is supported by continuing research grants from AMD, TCS-Research ISRO, DST and MeitY.
I am also deeply interested in the pedagogy of Analog IC Design and CMOS VLSI design, specifically in how foundational engineering concepts are mastered. Prospective students and collaborators are welcome to reach out via email.
Ph.D. : Electrical Engineering, IIT Bombay (Aug 2012- Jan 2018)
M.Tech : VLSI and Embedded Systems, IIIT Hyderabad (Aug 2007- Jun 2009)
B.Tech : Electronics and Communication Engineering, MMMEC Gorakhpur (Aug 2000- Jun 2004)
Associate Professor : IIIT Hyderabad (2026-present)
Assistant Professor : IIIT Hyderabad (2018-2025)
Post-doctoral research fellow : Department of Electrical and Computer Engineering, Purdue University, USA (2018-2020)
Research Associate : Department of Electrical Engineering, IIT Bombay (2017-2018)
Other (prior to Ph.D.) : Six years of industrial and academic experience (during 2004-2012)